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Hammer momentum leaving Itanic stranded
It's no hummer
Microprocessor Forum AMD and Intel packed the floor with their staff at yesterday's server Q&A at the Forum. Questions from employees - inevitably to the opposition - dominated the session. AMD fielded VP and chip CTO Fred Webber, and Intel put Robert Yung, enterprise platforms CTO into the firing line.
Fred starts his presentations with the intensity of a Boredoms record, and it doesn't drop. This is terrific for a few minutes, but after a while, it's like standing next to a drill. Fortunately he got his most compelling lines into the first few seconds.
"This is what 4GB of memory looks like," he said holding up 4 DIMMs. "It costs less than $1000, and anyone who needs 4GB can go get it now."
"The question is when will the 32bit x86 PC become a hopelessly outdated machine?" he said later. "You can follow DRAM trends to answer that one: some time by 2005 and 2006. It's unsustainable."
Several questioners - and not just from AMD, one was panel moderator Kevin Krewell - asked Intel why it wouldn't simply be easier to extend Xeon? How would Intel respond to the pressure.
"I haven't seen any pressure," replied Yung.
The question always used to be asked was how long Itanium would take to catch up with RISC. SPARC, PPC and MIPS would be sidelined by volume economics. Who seriously expected the pressure to come from below? But as Krewell said yesterday in an introduction, Hammer has received surprisingly strong support from Microsoft. (Even though Bill made Jerry dance for the favor, it is paying off.
AMD too can ride a swell of support from builders for Opteron, and hints from Dell that AMD has a serious proposition add to the momentum.
Webber added slides to his presentation that weren't in the prepared version handed out to the press and attendees. These purported to show Hammer outscaling Xeon on both integer and floating point benchmarks. The slide was indistinct from a distance, so we only report details we know. Hammer would turn in 1200 SPEC2000fp to Xeon's 700 at 1.8Ghz. But at higher frequencies, it would scale better: he predicted Intel would hit 800 at 2.8Ghz.
(We published AMD's first "estimated" benchmarks here yesterday. AMD told us that this is real silicon, but it is obliged by SPEC rules to est the est. Those are based on 32bit code.
Webber added that AMD would release 64bit native SPEC marks in the next "three to five months".
He said there's a 10-20 per cent improvement for code that doesn't need more memory, right off the bat. TPC-C scores go up 10 per cent for every doubling of memory, he added.
Xeon, we must add, has SMT (HyperThreading) which shouldn't help at all with SPEC data sets, but should help with real performance. Webber said AMD was in a position to add multiple cores to the Hammer family in the future.
"We've got multicore Hammer already at the electrical level," he said. "At 90 nanometers it's very practical … but we're not announcing any products today."
Itanium's process shrink will take it to 0.13 microns next year, and 0.09 in the subsequent generation. That could cure many of its heat and size problems, and make way for the bigger (6MB) cachces that Intel promises. But will it make it more attractive to software developers?
Don't expect to hear about Yamhill any time soon, stressed MDR's Krewell.
He referred to the latest rumor - and we'd be grateful if anyone could corroborate this - which suggests that Yamhill was dead as long ago as last Christmas… and that Microsoft killed it. Who wants to take two 64bit x86 instruction sets into the shower? ®
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