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Intel ‘Tejas’, 'Grantsdale' snaps spotted on web
Chipset schematics too
Intel's 'Tejas' processor isn't due to ship until the second half of 2004, but the chip maker is already producing reference boards and chip sockets for the part.
And you can see pictures of them over at Hexus, which has also come up with a schematic for 'Grantsdale', the chipset that will support not only Tejas but Prescott, its predecessor - and the successor to the current Pentium 4.
The Grantsdale layout confirms Intel roadmap details reported by ExtremeTech back in February. Grantsdale will support Tejas' 775-pin Land Grid Array layout, connecting the chip across a frontside bus with an effective bit rate of 800MHz. The chipset will handle 333MHz and 400MHz DDR SDRAM and, interestingly, 400MHz and 533MHz DDR II memory - up to 4GB of either, in dual-channel configuration.
Grantsdale will be based on PCI Express, using the next-generation bus spec. to link the chipset's North Bridge to the graphics card across a 4GBps link. The South Bridge uses lesser PCI Express links to provide two non-graphics add-in slots, plus 802.11 and Gigabit Ethernet support. The chip will support a single parallel ATA bus (to allow up to two drives to be connected) but four Serial ATA channels, allowing RAID 0+1 support out of the box (not to mention regular RAID 0 and 1, of course).
Legacy PCI support is included, plus the now obligatory eight USB 2.0 ports. Curiously, the schematic lists a third option channel alongside Serial ATA and parallel ATA on the peripheral bus, 'codec'. Does this imply some sort of multimedia acceleration technology built into the South Bridge?
Hexus' pictures show Tejas' ZIF socket assembly in rather more detail than ExtremeTech's photocopy scans. The reference board appears to contain a slot for a second processor, suggesting Tejas, unlike the P4, may be enabled for SMP, though there's nothing in the schematic to suggest this. ®