Update AMD today offered the possibility that it will take future Opteron server and workstation chips down the multi-core route espoused by Intel last week, and already well-trodden by IBM.
Speaking at the launch of the Athlon 64 and Athlon FX processors, AMD chairman Jerry Sanders said: "With coherent HyperTransport, it's inevitable that we'll have multiple cores on a single chip. This is a tremendous opportunity because with our architecture the scaling is far superior to anything else that's out there."
In fact, Athlon 64 has been architected with dual-core systems in mind. The chip's North Bridge components have been designed to support two cores, which share the processor's System Request Queue controller. This sits between the core(s) and the HT link, so HyperTransport isn't necessary for dual-core operation - though it would be if AMD wanted to go to four-core packages using the current architecture.
Last week, at Intel Developer Conference, company chief, Paul Otellini, pledged to ship first dual-core, then multi-core Pentium, Xeon and Itanium-class processors. The Itanic codenamed 'Montecito' will contain two cores, followed by the multi-core 'Tanglewood'. 'Tulsa', the next-but-one Xeon design, will contain two cores, as will future Pentium's - possibly as soon as 2005's 'Tejas'.
"We'll go from putting HyperThreading in our products to putting dual-core capability in our mainstream client processors over time," Otellini said.
IBM's Power 4 CPU and its upcoming Power 5 processor both feature dual-core designs. IBM's one-time PowerPC partner, Motorola, put a dual-core successor to its G4 processor family firmly onto its roadmap last summer.
As yet, AMD's own roadmap - the one made public, at least - doesn't feature dual- or multi-core processors, which we'd guess will come in when its 65nm process, currently being co-developed with IBM, comes on stream. ®