Transmeta yesterday revealed what few details it hadn't already announced about its upcoming Efficeon TM8000 processor - including clock speed and the name of the Nvidia South Bridge chip that will support the CPU - but left out one key fact: when it will be made available.
The processor will initially operate at 1.1GHz, and pack in 192KB of L1 cache (128KB for instructions, 64KB for data) and 1MB of L2 cache. The chip sports an integrated North Bridge providing an AGP 4x controller, a DDR SDRAM manager that can cope with up 266, 333 and 400MHz memory, and a 400MHz HyperTransport bus controller. The latter yields an aggregate bandwidth of 1.6GBps. The chip also supports the Flash-friendly Low Pin Count (LPC) bus.
All but the frequency and L1 cache size was revealed earlier this year. The clock speed marks a small jump over Transmeta's current top-end processor, the 1GHz Crusoe TM5800.
Also known before the event: the Efficeon sports an eight-issue 256-bit VLIW core running the latest generation of Transmeta's Code Morphine software - the code that enables the chip's x86 compatibility, including support for Intel's MMX, SSE and SSE 2 instructions. Or other instruction sets, if customers demand it. To date, it would seem, none of them have. The chip also features an updated LongRun power and heat management system.
Both the DDR controller and the L2 cache manager support ECC memory.
Transmeta again confirmed that Nvidia will be offering a South Bridge chip for the Efficeon, but this time gave the part a name: the nForce 3 Go 120 - a generic mobile part
The 130nm Efficeon will ship in a 29 x 29mm FC-OBGA 783-pin package. A 90nm version will ship in the second half of 2004, at frequencies of up to 2GHz, Transmeta said, building on its recent fab partnership announcement with Fujitsu. Exactly when the first TM8000 series chips will ship, the company didn't say.
Fujitsu was one of 14 hardware manufacturers to give the new chip the thumbs up, though HP and Sharp were the only other big-name suppliers on the list, highlighting the problems Transmeta has had garnering top-tier support for its products. Still, if the company can build a sufficient base of vertical market and contract manufacturer customers, the effect is much the same - no one says it has to go head to head with Intel.
But it desperately needs customers if it's to reverse its losing streak - it lost $22 million during its second fiscal quarter on sales of just $5.1 million. Transmeta's Q3 figures are due to be published tonight, and they're not expected to be much different from Q2's numbers.
Alongside the titbits of Efficeon info, Transmeta also discussed the next major release of LongRun, version 2. Due for inclusion in "future" Efficeons - probably the 90nm generation - the upgrade not only improves the processor's ability to dynamically adjust core voltage and clock frequency according to CPU load, but transistor current leakage and the wasted power it represents, the company claimed. ®