Server buyers who have been waiting for IBM to ship the Power6+ chip will be surprised to discover that it already has. It just didn't tell anyone.
Remember the Power Systems revamp Big Blue did back in October 2008? Well, guess what? Several of those machines were based on the Power6+ processor, the kicker to the dual-core Power6 chips first announced in July 2007. The clock speeds didn't go up, and in some cases, clocks were turned down so that IBM could pack more processors into a single box.
The 18 to 24 month Moore's Law curve led industry watchers to expect a Power6+ kicker about right now, and as I explained last week, Big Blue's own roadmaps suggested that a kicker was coming. Roadmaps from late 2006 showed IBM expecting a 4 and 5 GHz Power6 for 2009, and this was described as a "High Freq" and "Multi-Core" kicker called Power6+ with twice the oomph of the Power6.
By early 2007, the roadmap coming out of IBM showed a 2009 Power6 coming clocking from 3.5 GHz and 5 GHz, with Power7 "to come." IBM stopped being precise right about here. Way back when, as Power5+ was first being delivered in 2004, the word on the street was that the Power6 and Power6+ generations would span from 3 GHz to 6 GHz, and given that IBM was planning on an "enhanced transistor for higher frequencies," as it said in its roadmaps, it was reasonable to expect Power6+ kickers ranging in speed from 4.5 GHz to 6 GHz.
That clearly has not happened. Scott Handy, vice president of marketing and strategy for the Power Systems division, said in an interview that in later plans than I was working from last week, IBM was actually planning to save 5 GHz clock speeds for the Power6+ chips as well as some other features. But then it discovered that the speeds of the Power6 chips could be pushed up to 5 GHz as the company transitioned to a new instruction pipeline and moved to a 65 nanometer copper/SOI process.
So instead of 3 GHz to 4 GHz for Power6 chips, some pushed up toward 5 GHz or hit it, depending on the machine.
So why not admit back in October that the Power6+ chip was out? (Some tech specs online on that October launch day said the chips were Power6+, not Power6, and I was told these were typos by IBM's PR team). For the same reason that IBM isn't going to talk about Power6+ in the server announcements it will be making Tuesday at its Dynamic Infrastructure server shindig. Everything will probably be scrubbed of pluses because IBM doesn't want to field questions about the expectations of increasing performance.
"We are continuing to take share and we didn't need to highlight performance," Handy explained in reference to the decision to not admit that some of the October machines were based on Power6+ chips. "We do think that more of the value in our Power Systems is coming from the Power software stack."
This is called the "performance plus" marketing strategy at the Power Systems division. Rather than focus on the relentless pursuit of performance, IBM wants to focus on the other attributes of the system to sell against Hewlett-Packard, Sun Microsystems, and Dell, among others.
Besides, Handy added, in the heavily virtualized environments where IBM is peddling Power-based servers, CPU speed is not as limiting a factor as is main memory capacity. And IBM is able to cram 256GB into a 4U Power 550 (which sports from 2 to 8 cores) and up to 384 GB in the same 4U space with the Power 560, which was one of the machines using a geared down Power6+ chip running at 3.6 GHz and which had from 4 to 16 cores in that box. (Each Power6 or Power6+ chip is a two-core chip with two threads per core).