Like all remaining Itanium vendors aside from HP, NEC is shifting its focus to Intel's new Nehalem-EX Xeon 7500 processors for its big-iron beasts.
The times, they are a-changin'. NEC made a big deal about high-end Itanium-based systems in the prior decade, notching up big benchmark wins with its 16-socket "Azuza" and 32-socket "Azama" machines in the Express5800 family, sporting its A family of chipsets.
Now, in an effort to get to market quickly and to offer some differentiation compared to others building Nehalem-EX boxes, Mike Mitsch, general manager for the IT Platform Group at NEC America, says that NEC's engineers took some of the RAS goodies from the Itanium versions of the Express5800 server line (the Express5800/1320Xf and its A3 chipset, to be precise) and ported them over to the new Express5800 GX series, which uses the Xeon 7500 processors.
The idea is exactly what El Reg quipped when the Xeon 7500s were launched - they're like Itanium, only this time you might actually use 'em.
The Express5800 "Glueless Xeon" GX servers are completely designed by NEC, not developed in conjunction with Unisys like the "Monster Xeon" MX machines (using the four-core and six-core Xeon 7400 processors) that were announced in September 2008.
The Express5800 MX machines are cell-based symmetric multiprocessing systems based on four-socket mobos. Each Monster Xeon server chassis has one four-socket cell, and four chassis are lashed together using external SMP links to create a 96-core box, known by the easy-to-remember name Express5800/A1160 MX server.
The MX chipset used in the server sports 80GB/sec of bandwidth to link the main and cache memories on the four server nodes into an SMP configuration, and the box holds 1TB of main memory using 8GB fully buffered DDR2 memory sticks.
The Monster Xeon server designed by NEC and Unisys (and manufactured by NEC) supported the four-core and six-core "Dunnington" Xeon 7400 processors, which used the old frontside bus architecture instead of the new QuickPath Interconnect that the Nehalem and now Westmere Xeon chips employ. The Dunningtons did not support Intel's HyperThreading simultaneous multithreading, either, which means the box topped out at supporting 64 threads running at 2.4GHz or 96 threads running at 2.66GHz.
Rather than take the MX chipset and retrofit it to support the new Xeon 7500 processors with their new sockets and interconnect, NEC decided to instead start from scratch and build a midrange box that gluelessly scales from two to four sockets in a single system. By doing so, it could get a machine in to the field relatively shortly after the Xeon 7500s were announced. The Xeon 7500s debuted on March 30, and NEC started shipping servers using them on May 5 - but only started telling people this week, for some reason.)
Dell was also bragging that its four-socket Xeon 7500 boxes, the PowerEdge R810, R910, and M910, which El Reg told you all about here, started shipping on April 27. IBM's rack and blade servers using the Intel Xeon 7500 chips and Big Blue's ex5 chipset were rolled out on March 30 and will ship on June 25. Cisco Systems and Silicon Graphics have fielded four-socket Xeon 7500 machines, as well. As we previously reported, Hewlett-Packard is working on its own Nehalem-EX beastie boxes, the four-socket ProLiant 580 and the eight-socket ProLiant 980, and Oracle is also cooking up its own eight-socket rack box using the chip. Both HP and Oracle are rumored to be getting their boxes into the field in the June timeframe.
NEC wanted to be on the front-end of this wave, says Mitsch, which is why it went with the glueless GX design instead of re-engineering the MX design.
The Express5800/A1080a GX server comes in a 7U chassis and comes in three different flavors. The A1080a-S puts a single four-socket board in the box with a single service processor. That service processor is one of the key differences between the NEC machines and other Nehalem-EX boxes in that it takes the Intelligent QPI BIOS that NEC developed for its Itanium-based Express5800 servers (remember, Itanium was supposed to have QPI already, and NEC was ready for it even if Intel was not).