Seduced by the 'Megahertz Myth'
When NetBurst was introduced, the market had been taught to salivate when the high-clock-rate bell was rung. When we asked Pawlowski if Hyper Pipelined Technology and its high clock speeds was a marketing decision, he said, "It may have been a marketing decision, but that's what people bought at the time."
And the power required to goose those clock rates wasn't that big a problem at that time. "We were within a decent power envelope," Pawlowski told us. "The power envelope wasn't pushing 130 watts, maybe they were 40, 50, 60 watt parts." That said, he acknowledged that the message Intel wanted to send to the market was "'Hey, we've got the fastest gigahertz part'. That's what people were looking for."
There was also the fact, he admitted, that since the P6 architecture was such an improvement over P5, expectations for generation-to-generation performance improvements had been raised – including his own.
"When you get to the next part, you're kind of looking for 'How do we repeat history and do the same thing over and over again?'," he said. "You get spoiled, and you tend to get a little more aggressive, and you tend to think 'If this is important to me, then it must be important to the market'."
Unfortunately, the market had other ideas. "It wasn't until our customers said to us, 'We're not pushing socket power beyond 130 watts' – in the server space; in client it was certainly lower – 'We're not pushing that socket power any higher' that we had to have a wake-up call," he said.
There was an additional wake-up call, as well. "[AMD's] Opteron came out with a much more power-efficient architecture," he said. "They didn't focus on megahertz, but they got reasonable performance."
There was also the fact that the market was becoming more mobile, and NetBurst parts were unsuited for the cramped insides and relatively low-power capabilities of laptops and notebooks.
These were not the best of times for Intel. "I gotta admit," Pawlowski said, "when I left the labs and came to the product group, it was brutal, because in 2005 when we were really at the dip, at the low spot of where our architecture was competitively, because we were still pushing megahertz."
To make matters worse, he was getting needled about the competition. "I got the question, 'Why didn't you guys integrate the memory controller? How did little AMD just beat you guys to it?'" His response was: "They had nothing to lose. They really didn't."
Fortunately, as Pawlowski tells it, Intel's Israeli design team was working on a P6-based part in an effort to attempt to integrate an on-die memory controller with a Rambus memory subsystem. That part never came to fruition, but some of the project's P6 refinements made it into the Pentium M, code-named Banias, and the Core microarchitecture, which helped salvage Intel's mobile future.