Israeli upstart DensBits says it can make short-life TLC flash run longer than some long-life MLC rivals because of its fancy adaptive controller tech.
TLC (three-level cell) flash stores 3-bits per cell instead of the one found in SLC (single-level cell) and the two found in MLC (multi-level cell) chips. Each additional bit in a cell lowers its speed and shortens its working life due to the extra electronic complexity, but obviously increases capacity.
There's no getting away from the fact that the cycle of deleting and rewriting blocks of cells cannot be repeated with TLC chips as often as MLC can sustain. The ongoing reduction in the process geometry size of NAND memory exacerbates the problem: 29-20nm process flash has a shorter working life than 39-30nm.
What happens is that, as the cell ages, the amount of noise masking the bit signals sought during reading from the cell increases with the error rate. Technologies such as digital signal processing are being used to enhance the signal and that led to DSP pioneer Anobit being bought by Apple.
A key attribute enabling flash storage to become more popular is the reduction of its dollar-per-gigabyte value compared to hard disk drives. TLC flash is seen as promising a big advance on this as it stores half as much data again as MLC flash. Until recently TLC's working life or endurance has been too limited to permit its use in any situation involving lots of writes, such as in enterprise storage arrays, solid-state drives and servers.
This chart shows some lowish estimates of flash endurance: 59-50nm process MLC flash has a raw rating of 10,000 Phase-Erase cycles, which falls to 2,500 with TLC flash. With a 39-30nm process the numbers are 5,000 and 1,250 respectively; with a 19-10nm process they fall to 3,000 and 750 respectively; obviously ridiculously unsuitable for enterprise flash applications.
DSP controller technology, plus sophisticated error correction, over-provisioning and wear-levelling can increase these figures such that MLC flash can now be offered with a multi-year working life. One example: an 800GB capacity Intel 910 SSD is offered with the ability to have 10 full drive writes a day for 5 years.
Up until now no flash controller company has said it has TLC flash product with enterprise-class endurance. Step forward DensBits. Its DB3610 controller offers "an extreme endurance figure of more than 10,000 P-E cycles [and] more than double the endurance of 2 bits-per-cell (MLC), and near-MLC read-write performance".
The company says it supports both 2xnm and 1xnm process technologies, and SSDs using its controllers can exhibit 95MB/sec sequential read performance, 65MB/sec sequential writes, 4,000 random read IOPS and 1,100 random write IOPS. These are, to say the very least, respectable numbers.
DensBits calls its intellectual property Memory Modem technology, which is, it says:
Composed of jointly-designed, all-proprietary ECC, DSP, and flash management solutions, specifically designed to account for the unique problems of advanced flash memories. DensBits' proprietary ECC solution, regardless of its application to flash, represents a scientific breakthrough, outperforming, by far, the industry's best ECC implementations including LDPC.
It reckons its technology, devised by a clever group of PhD people, enables suppliers to use 30 per cent cheaper TLC flash where MLC flash is used in embedded applications now. DensBits Amir Tirosh, EVP for marketing and business development, said; "We're also currently working on extending our offering to SSDs in both consumer and enterprise applications."
An overview of it can be downloaded here [PDF]. Zsolt Kerekes, of StorageSearch, discusses the technology here. Violin Memory says deduped TLC flash costs less to store data than 10,000rpm SAS disk drives and should introduce a TLC flash-based product within twelve months. Perhaps it's licensing DensBits technology. If this technology is for real then it will spread like wildfire throughout the flash world. ®