One of the challenges of putting quantum computing theory into practice is replacing large laboratory setups with integrated devices. A group of Cambridge researchers says it has demonstrated that a quantum controlled NOT gate can be implemented all in silicon devices.
The researchers, from Toshiba’s Cambridge Research Laboratory and the Cavendish Laboratory at Cambridge, say they have demonstrated a two-qubit gate in which the emitter, optical circuits, and detectors have all been implemented in silicon, “a promising approach towards creating a fully integrated device for scalable quantum computing”.
The researchers’ paper on Arxiv notes that the CNOT gate is important since, in combination with single-qubit gates, it can be “used to perform any quantum operation”.
Their emitter is an indium arsenide (InAs) quantum dot in a 1.5 micron microcavity pillar. This structure, they say, has a good probability of producing indistinguishable pairs of photons, and has good collection efficiency (the photons have to be indistinguishable so as to maximize their interaction).
The emitted photons are then beam-split in a waveguide, with the refractive index between the core and cladding regions confining the photons within the structure. This implements a quantum CNOT gate in which the path taken by photons represents the quantum state of the system.
Although the circuit has been built using standard silicon processing kit, it does have to be cooled to 4.5 Kelvin. However, the researchers note that the scheme could be extended to incorporate multiple single photon sources, to handle multi-photon input states. Further integration of the photon source and detectors, they say, will reduce the chip’s current 1.25 x 32.5mm. ®