To hear Intel Fellow Matt Adiletta tell it, Chipzilla not only invented the term microserver but saw the trend towards wimpy computing coming way ahead of the all this fawning over the ARM architecture and a half-dozen upstarts wanting to take big bites out of the Xeon server processor cash cow.
When El Reg says "fawn", that's an intentional pun that harkens back to FAWN: A Fast Array of Wimpy Nodes, a paper published in May 2008 by a bunch of
server geeks researchers at Carnegie Mellon University.
That paper compared the energy profile and performance of x86 and ARM architectures, specifically for server nodes equipped with flash storage. It demonstrated how the combination of low-powered (in terms of both performance and electrical consumption) processors combined with flash could yield a 50X improvement over then-current x86 and hard-disk clusters fielding requests from a key-value store, and on the order of 4X compared to low-power x86 chips mated to flash.
Subsequent papers published by the CMU researchers were done in conjunction with Intel Research, as you can see at the FAWN project.
Adiletta, as it turns out, caught the microserver bug back in 2006, when it wasn't even called that yet. In 2007 his team at Intel created what he calls a "CPU DIMM" that was about the size of a folded wallet, as he explained in a conference call today with the press, that had either Atom or two-core Core desktop/laptop processors on them. It had a lot of pin and signal connectors and plugged into a memory slot, and Adiletta explained that in 2008 he had shown it to none other than Sun cofounder and serial capitalist Andy Bechtolsheim to get his opinion.
Bechtolsheim asked a lot of questions about thermals, performance, reliability, and other feeds and speeds, then was quiet for a bit, holding his head in his hands and rocking a little bit. "Geez, it just hurts my head to think about all of the opportunities this could provide if we can realize it," Adiletta recalls Bechtolsheim finally saying as he came out of his trance.
Intel's point in hosting Thursday's meeting with journos and in telling this story about the meeting with Bechtolsheim is that the company wants to demonstrate that it has not been caught by surprise by either the advent of microservers or the movement of the ARM architecture from the smartphone and embedded spaces into the data center. In fact, the second generation of FAWN research at CMU compared x86 to ARM because Intel knew where the real competition would come from.
El Reg notes that at this time Bechtolsheim was the CTO for servers at Sun Microsystems, which was nearly three years away from being thrown into the arms of Oracle after a catch-and-release by Big Blue. What Bechtolsheim did not do was launch microservers at Sun, but rather he invested his money in Arista Networks, where he became chairman and chief development officer in late 2008.
Bechtolsheim likes to flip back and forth between systems and networking, and has his own kind of ticking and tocking going on.
Adiletta, as the godfather of microservers at Intel, was trotted out to establish this creation myth in our psyches and to also to remind everyone that Intel is expected to launch its dual-core "Centerton" processor before the end of the year – than means soon, obviously – as the first server-class Atom processor.
"Having more chefs in the kitchen helps, up to a certain point, depending on what is being served," Adiletta explained by way of metaphor to illustrate why Intel was enthusiastic about its impending Atom S Series of server chips and the possibilities they present. "We're very bullish on this segment."
Maybe Intel's researchers were indeed enthusiastic about microservers, but their business managers were not so sure and absolutely did not want to upset the Xeon cash cow, particularly during the Great Recession.
As Jason Waxman, general manager of the Cloud Computing Group at Intel, put it when microserver upstart SeaMicro launched a Xeon-based SM10000 cluster in January of this year: "SeaMicro is pretty modest. They were really the first company to push us hard on the Atom, and they are the first to develop a system that supports both Atom and Xeon."
It's the interconnect,
A little more than a month later, floundering AMD, looking for some kind of salvation after having big handfuls of server market share ripped from it by Chipzilla, snapped up SeaMicro for $334m and is now working on an Opteron ARM processor due in 2014 with SeaMicro's interconnect fabric gluing them together into what amounts to a data center in a box.
The assembled hacks pressed Adiletta for more details about the Atom S Series roadmap, and this hack in particular asked about the way that Intel would embed interconnects onto the chip as Calxeda has done with its EnergyCore EXC-1000 processors or Applied Micro Circuits has done with its X-Gene chips.
As far as Calxeda is concerned, putting ARM cores and a distributed Layer 2 switch that scales to 4,096 nodes today and to over 100,000 nodes in a few years is the real engineering task with microservers – not welding an Ethernet NIC to an Atom processor. After having bought Ethernet chip maker Fulcrum Microsystems a few years back, Intel certainly could respond with something similar, but Adiletta was not there to provide an actual roadmap, but rather to establish Intel's cred in microservers and ramp up excitement for the Atom S Series.
"This has been a classic question from the communications space for a long time: do you go distributed or do you do centralized," explained Adiletta when asked about integrated networking on the future Atoms.
"Quite frankly," he said, "if you talk to comms folks, it is a religious argument. If you do centralized, then one of the nice things is how you can manage it and hop counts. Latency is interesting. There are pluses and minuses to both approaches. I wish I could go into some real technical details on this, but frankly I am quite bullish on what our approach is going to be."
That wasn't a real answer, and Adiletta would have been taken out behind the Intel PR woodshed if he actually did answer the question. But what seems clear is that Intel is going to put Ethernet ports onto the future "Avoton" Atom S Series chips due in 2013, and will rely on its foundry advantages and tweaks to the Atom core (moving from in-order to out-of-order processing was one such change that Adiletta hinted at) to drive thermals down and performance up, and then haul out the old x86 compatibility saw that it's also using to help promote its Xeon Phi parallel x86 coprocessors in supercomputing.
What Intel should probably do is embed an Atom S chip on a Xeon Phi, use the PCI slot for power only, slap an InfiniBand port on it, stick a boatload of SATA or SAS ports on it for hard disks or SSDs, and throw away the Xeon node for all but the most serious single-threaded work where a brawny core is required. (We are only half joking here.)
"There is a lot of performance that we could gain by adding sophistication to our Atom cores," Adiletta said. "I like where we are. We have the right tools in the toolbox and the management support to go out and do this."
Later in the Q&A session, Adiletta said that the future Atoms would "show very, very good low-power idle power metrics," which of course is something that ARM chips can already boast. And looking at thelow power states in Intel's future "Haswell" microarchitecture, you can be forgiven for thinking that Intel might be tempted to do away with Atoms altogether and just stick with Xeons in the next few years.
For all we know, the lack of serious attention to Atom-based servers up until fairly recently could be another reason why CEO Paul Otellini is retiring next May. Perhaps Otellini wants some young blood to handle the shift that will turn the Atom into the new Xeon and the Xeon into the new Itanium, at least in hyperscale data centers and for more workloads as more and more software gets parallelized.
Remember, after all, that it took the Core architecture to be spun up into a Xeon in Opteron drag to vanquish AMD, and it might take an Atom phone and netbook processor wrapped in Xeon drag to repel the onslaught of the ARMed rebels. ®