Intel has released details about its new Silvermont Atom processor microarchitecture, and — on paper, at least – it appears that Chipzilla has a mobile market winner on its hands.
Yes, yes, we know: you've heard it all before, from Menlow to Moorestown to Medfield. Intel has made promise after promise that its next Atom-based platform would be its ticket into the mobile show, but – not to put too fine a point on it – they've failed.
Nimble, snappy, power-miserly chips based on the ARM architecture – from Qualcomm, Nvidia, Apple, Samsung, Texas Instruments, and others, including possibly your aunt Harriet – have simply eaten Intel's lunch in the mobile space during the long, slow years in which Chipzilla has attempted to move its x86 architecture down into the low-power market.
On Monday, however, the general manager of the Intel Architecture Group, Dadi Perlmutter, and Intel Fellow Belli Kuttanna gathered a group of journalists at their company's Santa Clara, California, headquarters, and "took the wraps off" Silvermont, the new Atom microarchitecture that they promise will finally allow Intel to crack the low-power chip market in a big way.
This time, it looks like they may very well be telling the truth – that is, of course, if Silvermont will provide a choice of three times the performance or one-fifth the power of the current-generation Atom compute core, as they claim.
And remember, when we say "low-power" market, we're not simply talking about smartphones and tablets – although those hot commodities are clearly key to Silvermont's future. Intel's new Atom compute-core microarchitecture will indeed appear in the Bay Trail platform for tablets ("scheduled for holiday 2013") and the Merrifield platform for smartphones ("scheduled to ship to customers by the end of this year"), but it will also find a home in the Avoton microserver platform and the Rangeley network-equipment platform ("both ... scheduled for the second half of this year"), and an as-yet-unnamed automotive platform.
Linux, Windows, and Android, of course – Perlmutter wouldn't comment on iOS, of course (click to enlarge)
In all of these platforms, Silvermont will bring a host of improvements to the Atom's compute-core architecture – an architecture that has remained essentially the same (with tweaks) since it was first announced in 2004. Code-named Bonnell, it shipped in 2008 at 45 nanometers, then was integrated into a system-on-chip, Saltwell, which shipped last year at 32nm.
Before we dig into an explication of the new architecture, we should first offer a word of thanks to the technology that makes it possible: Intel's FinFET wrap-around transistor implementation that it calls Tri-Gate. When we first wrote about that 22nm transistor technology back in May 2011, we noted that it might be Intel's last, best chance to crack the mobile market.
Now that Intel has created an implementation of the Tri-Gate transistor technology specifically designed for low-power system-on-chip (SoC) use – and not just using the Tri-Gate process it employs for big boys such as Core and Xeon – it's ready to rumble.
Tri-Gate has a number of significant advantages over tried-and-true planar transistors, but the one that's of particular significance to Silvermont is that when it's coupled with clever power management, Tri-Gate can be used to create chips that exhibit an exceptionally wide dynamic range – meaning that they can be turned waaay down to low power when performance needs aren't great, then cranked back up when heavy lifting is required.
This wide dynamic range, Kuttanna said, obviates the need for what ARM has dubbed a big.LITTLE architecture, in which a low-power core handles low-performance tasks, then hands off processing to a more powerful core – or cores – when the need arises for more oomph.
"In our case," he said, "because of the combination of architecture techniques as well as the process technology, we don't really need to do that. We can go up and down the range and cover the entire performance range." In addition, he said, Silvermont doesn't need to crank up its power as high as some of those competitors to achieve the same amount of performance.
Or, as Perlmutter put it more succinctly, "We do big and small in one shot."
Equally important is the fact that a wide dynamic range allows for a seamless transition from low-power, low-performance operation to high-power, high-performance operation without the need to hand off processing between core types. "That requires the state that you have been operating on in one of the cores to be transferred between the two cores," Kuttanna said. "That requires extra time. And the long switching time translates to either a loss in performance ... or it translates to lower battery life."
In addition, with a 22nm Tri-Gate process you can fit a lot of transistors and the features they enable into a small, power-miserly die – but that's so obvious we won't even mention it. Oops. Just did.