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AMD's first 64-bit ARM cores star in ... Heatless in Seattle*

* Relatively speaking – this SoC tries to be low-power, data-center-grade

Why switch x86-64 for ARMv8-A?

But why use ARM-compatible CPUs as the brains of the data center, you may be thinking. The ARM architecture is already in server warehouses – embedded within the controllers in your hard disks, for example. But now the architecture, famous for being low-power and low-complexity and thus ideal for battery-powered things, is leaping into compute. And it leaves people scratching their heads.

That ARM had to go 64-bit to enter the server space is obvious: it opens up 64-bit-wide virtual addresses to software, and it gave the British core designers the opportunity to come up with a clean new instruction set that resembles MIPS64. It also gives a little more headroom with physical memory, moving the architecture from 40-bit physical addresses (max 1TB) to 48-bit (256TB).

In touting Seattle, AMD argues that a lot of data center lifting – think front-end web servers – is unsuited to watt-gobbling, bogglingly complex x86-64 processors, and thus the job ought to be passed to chips that are smaller (so more can be crammed into racks) and less power hungry (always the USP of the ARM family).

Seattle measures 27mm x 27mm and is said to have a TDP of about 25 watts. The x86-64 eight-core 2GHz Intel Xeon E7-4820 v2, for example, is 52mm x 45mm and has a TDP of 105 watts, although we'll admit it's not a totally fair comparison.

Perhaps a fairer one would be the Intel Atom Processor C2758: eight x86-64 cores, 2.4GHz clock speed, 34mm x 28mm package using a 22nm process, and a TDP of 20W – revealing Intel's reaction to potential competition in the low-power data center market: drastically slimming down its x86 iron.

Server software handling large numbers of concurrent requests can end up touching a large range of data, causing a high rate of costly data cache misses [Bhatia et al, 2006]. Thus, AMD argues, you may as well use CPUs with smaller caches and lower complexity, which gives you lower power consumption and higher density.

"Seattle is a dense server processor for data center applications. Performance per dollar per watt drives today’s data center designs," AMD's Sean White will tell Hot Chips from 5.30PM today, California time.

"A significant number of data center workloads have inherently low Instructions Per Clock (IPC) and high cache miss rates. For such workloads, processors like Seattle, with smaller cores and caches, can deliver the equivalent performance as traditional server processors with large cores and caches, but using much less power and area."

Building software and hardware for Seattle

AMD will also show off its Seattle reference system that doubles as a $2,999 development kit: a 2U rack-mount box with one PCIe gen-3 x8 slot or two x4 slots, ports for up to eight hard drives, a microATX motherboard with a Seattle SoC, two 10Gbit Ethernet ports, four I2C interfaces, two serial ports, and 64-bit ARM Linux in the form of a Fedora distro, ARMv8-A versions of Java 7 and 8, and the usual GCC toolchain.

Hot Chips ... the Seattle reference board

AMD is, of course, not alone in churning out 64-bit ARM-flavored chippery, although Seattle is its first. Allwinner and Samsung are aiming theirs at fondleslabs, handsets and the like; processor core architect ARM itself is touting the Juno board to developers; and Apple has been packing ARMv8-A compatible SoCs in its iPhones. Upstart Calxeda sadly couldn't bring its 64-bit ARM cores to market soon enough, causing it to run out money.

The Seattle silicon, fabricated by GlobalFoundries, is due to ship in the fourth quarter of 2014. ®

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