Pic Researchers have found a way to make tiny 3D structures out of silicon that "pop up" into shape when glued to an elastic substrate, paving the way to new forms of electronics.
The minute shapes mimic complex mechanisms in biology – such as the internal structure of teeth and networks of veins and brain cells – and could be used for micro-mechanical systems, opto-electronics and materials that can alter shape at will.
Silicon is quite bendy when it's made thin enough, and can be made to pop up like cutouts in a child's book. The teams at Northwestern University and the University of Illinois at Urbana-Champaign in the US created 2D silicon structures and then bonded them onto a pre-stretched substrate. When this is released, the semiconductor is forced to rise up into a 3D form.
"We've demonstrated the system works with semiconductors and conductors," Professor David Rogers of the University of Illinois school of engineering told The Register. "Where we're going next is to build multilayered devices with specific functions, and to go full CMOS."
The research, published as the cover story in the latest issue of Science, shows that software can be used to accurately model which structures are possible within the constraints of silicon's breaking strain, and that this is reflected in real-world results.
"With this scheme, diverse feature sizes and wide-ranging geometries can be realized in many different classes of materials," said postdoctoral fellow and co-author Zheng Yan.
"Our initial demonstrations include experimental and theoretical studies of more than forty representative geometries, from single and multiple helices, toroids and conical spirals, to structures that resemble spherical baskets, cuboid cages, starbursts, flowers, scaffolds, fences and frameworks, each with single and/or multiple level configurations."
Each of the strange shapes are a few centimeters squared in size, but Prof Rogers thinks the tech can be built on industry-standard 300mm-diameter wafers. Even better, building the structures is possible using today's chip fabrication methods, so the cost of entry should be very low.
Getting to this stage has taken the team three years, but now it is looking to develop the technology further using new materials and refining it for eventual industrial use. ®