A battery small enough to be mounted inside a chip has been developed at University of Illinois at Urbana-Champaign.
The technology to do this combines 3D holographic lithography, 2D photolithography and low-power electroplating – all techniques which are standard in processor production. The special ingredient is the ability to electroplate to build a battery at temperatures which don’t damage the rest of the device.
Prof Paul Braun explained to El Reg that the existing battery, which measures 2mm x 2mm by 10µm, has enough power to run a ½mA LED for five to ten seconds, which is plenty for low-power radio applications. “It’ll fit inside a baby aspirin,” he told us.
The technology could be used to build medical devices which passed through the body and radioed out what they found to a nearby doctor. It would need wireless charging for extended implantation but isn’t explicitly engineered for that.
Battery life could be extended by making it bigger in any dimension, “although we’d struggle beyond 100 microns thickness”, Braun told us. “But you could make it ten times more powerful.”
Other parameters, such as the size and shape of the electrodes, surface area, porosity and tortuosity, can be tweaked for different applications. The priority has been medical devices but Prof Braun has also seen interest from the packing and printing industries.
“It’s hard to extrapolate pricing for millions of units, but we are looking at under $1 – maybe down to ten cents,” he told us. There are also applications in monitors, distributed wireless sensors and transmitters.
Putting the battery inside the chip is an unusual approach, because it has proven so hard to miniaturise the energy storage. Instead, the battery or capacitor is a separate component.
Details of the research have been published in the paper Holographic Patterning of High Performance on-chip 3D Lithium-ion Microbatteries, appearing in the Proceedings of the National Academy of Sciences. The abstract describes the paper:
Microscale batteries can deliver energy at the actual point of energy usage, providing capabilities for miniaturising electronic devices and enhancing their performance. Here, we demonstrate a high-performance microbattery suitable for large-scale on-chip integration with both microelectromechanical and complementary metal-oxide–semiconductor (CMOS) devices. Enabled by a 3D holographic patterning technique, the battery possesses well-defined, periodically mesostructured porous electrodes. Such battery architectures offer both high energy and high power, and the 3D holographic patterning technique offers exceptional control of the electrode’s structural parameters, enabling customised energy and power for specific applications.
The 3D holographic lithography to build the interior structure of electrodes and 2D photolithography defines the required electrode shape. The holographic technique uses the interference pattern between multiple optical beams fired through the photoresist to build the shape and create supercapacitor-like power because of the way the design creates periodically structured porous electrodes, facilitating the fast transport of electrons and ions inside the battery.
This is only just leaving the lab and no silicon vendors have yet signed up for the technology. Nor has it been designed with any particular fab in mind, so retail products are still a long way off. But the technology opens the door to much smaller things in the Internet of Things. ®