Intel will fab Xeon processors that support 3D XPoint DIMMs in two years, its CEO signaled to analysts on a conference call this month.
3D XPoint is Micron and Intel's post-NAND, non-volatile memory technology that is claimed to be faster than NAND, with near-DRAM speed, and denser and longer endurance. It is intended to fill a performance gap between DRAM and NAND and provide storage-class (Persistent) memory.
Intel is sampling 3D XPoint SSDs with OEM customers now but such drives will use an NVMe/PCIe interface, which is slower than putting the media on the faster memory channel using DIMM sockets.
In a conference call on the day Intel announced its Q3 2016 figures, chief exec Brian Krzanich said this about XPoint SSDs: "On the 3D XPoint, it will be qualified at the end of [2016's fourth] quarter. And we're shipping thousands of samples to customers, we're shipping samples already, we'll ship thousands through this quarter. And it ramps in 2017... revenue growth in 2017, samples, thousands in the fourth quarter and qualified at the end of the quarter.
"There will be a second generation of Purley that includes 3D XPoint. It allows pooling of memory, and then there will be future ones that will allow additional pooling of things like FPGA. So, each one of these now add some additional features across the rack that really helps in the overall system performance."
We understand that Krzanich means second-generation Purley chips will take 3D XPoint memory DIMMs. This Xeon processor family is due to arrive in 2018, just in time for Intel to deliver these next-gen CPUs and XPoint DIMMs for the Aurora supercomputer in late 2018.
The Purley gates
Purley is the codename for a 14nm Skylake-microarchitecture server processor.
Purley processors are understood to have up to 28 cores and 56 threads, and support the 100Gbps Omni-Path interconnect and Silicon Photonics. We believe Intel is set on delivering versions of Purley chips with integrated accelerators, such as encryption and compression engines, graphics, media transcoders and FPGAs.
Krzanich was being coy, and trying to blur the situation to avoid tipping his hand. To us it sounds as though first-generation Purley chips will not interface directly with 3D XPoint DIMMs – whereas last year it was strongly suggested that first-gen Purley parts would hook up with 3D XPoint DIMMs. These first-generation processors are sampling with selected customers now with general availability expected around mid-2017.
Meanwhile, second-generation Purley will arrive the following year, and most definitely include tight 3D XPoint integration. According to Krzanich's comment, third-generation Purley will have pooled FPGAs; we think this third-generation series could be a 2019-2020 story.
It's possible that 3D XPoint DIMMs could be supported before second-generation Purley silicon arrives, with that processor bringing XPoint closer to the CPU somehow, perhaps with an Omni-Path interconnect.
There has been speculation that Intel could use 3D XPoint as a large-scale DRAM substitute, with terabytes of 3D XPoint used to bulk out a DRAM core, save DRAM cost and provide performance near that of a full DRAM system but at a lower cost.
A key set of events will be how the server OEMs react to 3D XPoint DIMMs. If they reject those, or are half-hearted, as they are with flash DIMMs currently, then Intel gets a second bite at the server XPoint adoption cherry with gen-two Purley processors.
None of this is simple. Keep watching the XPoint space. ®