The United States' Defense Advanced Research Projects Agency (DARPA) wants to find the electronics industry's next iteration of Moore's Law and has loaded up a US$75 million defibrillator to jolt industry into making it happen.
The moolah comes by way of an expansion of the blue-sky agency's Electronics Resurgence Initiative (ERI), which already had $141 million on its books to spend in 2018.
As DARPA's announcement of the cash splash says, it's getting harder and harder to keep Moore's Law tick-tocking over. As Bill Chappell of the agency's Microsystems Technology Office puts it: “The current trajectory is straining commercial and defence developments”.
The new money will support six new ERI programs to support basic research into new materials, circuit design tools, and system architecture.
- 3D chip designs – the Three Dimensional Monolithic System-on-a-Chip (3DSoC) program, which looks at the materials needed to add the third dimension to chip designs;
- The Foundations Required for Novel Compute (FRANC) program, which hopes to break the memory bottleneck in today's von Neumann designs;
- In circuit design, there's Intelligent Design of Electronic Assets (IDEA), to try and automate IC-level circuit design; and the Posh Open Source Hardware (POSH) program, to create a complementary open source design and verification package;
- The first part of the ERI Architectures thrust is The Software Defined Hardware (SDH) program. This kind of describes itself – it's about making hardware more readily reconfigurable. Everybody needs to hand-craft an ASIC-driven Bitcoin rig, right?
- Also under the “architecture” heading is the The Domain-Specific System on a Chip (DSSoC) program, to help “develop multi-application systems through a single programmable framework”.
Proposers' days for the programs are September 18 for DSSoC, September 19 for SDH, September 22 for IDEA, POSH, and 3DsoC, and a Webinar September 15 – yes, that's this Friday – for the FRANC program. ®