Alibaba sketches world's 'fastest' 'open-source' RISC-V processor yet: 16 cores, 64-bit, 2.5GHz, 12nm, out-of-order exec

Coming to an FPGA near you, soon, maybe, hopefully?


Analysis Chinese tech giant Alibaba claims to have designed the fastest RISC-V processor to date, and reckons it will open source at least some of the blueprints for others to use.

The chip was unveiled this week at Alibaba's Cloud Summit in the Middle Kingdom, though details are curiously thin. Word reaches us of the development, though, amid China's soaring interest in the fledgling RISC-V, which at its heart is an open-source instruction set architecture backed by Google, Nvidia, Western Digital, Qualcomm, Alibaba, and others.

RISC-V is exciting for China because it allows the nation's eggheads to access, improve, and extend a bunch of the West's processor technology without having to worry about any future US trade sanctions, thanks to the architecture family's openly available materials. Everything you need to start experimenting with the tech and improving it – the ISA documentation, CPU cores, and software stacks – is already out there over the internet, and it's too late to cut that knowledge off.

While the RISC-V ISA is open source, implementations of its CPU cores don't have to be – and yet, there are a range of cores available to download, evaluate, and drop into FPGAs, ASICs, or system-on-chips, for free. Now you can design custom circuitry and accelerators, add some RISC-V cores to execute application and management code, test and fabricate it, and voila: you've got your own chip on the cheap without having to worry about trade blockades, and your own homegrown intellectual property. Which is cool for everyone, especially China.

What's under the hood

Alibaba's RISC-V processor design – the Xuantie 910, or XT 910 for short – is the first set of blueprints of its kind from the tech goliath's R&D division. The unit, dubbed T-head or Pingtouge, which means honey badger in Chinese, wants to draw up chips to power or accelerate the usual trendy stuff: machine learning, self-driving cars, edge servers, 5G networks, and the Internet of Things. The XT 910's architecture is good for producing micrcontrollers, general-purpose processors, and system-on-chips, we're told.

Here are the specs, according to Alibaba: the Xuantie 910 is a 12nm 64-bit (RV64GCV) RISC-V processor with 16 cores clocked at up to 2.5GHz. It can perform out-of-order execution, and has a triple-issue 12-stage pipeline. It is hoped to be at least partially open sourced soon, allowing you to drop its hardware-design code into an FPGA to try out and potentially take further.

There's no sign of that source code yet online, though it is expected to land on GitHub at some point. The component, it is reported, will also go on sale as a commercial thing – seemingly a set of design files for system-on-chip makers to license. We imagine central aspects of the Xuantie 910, such as its CPU cores, may be open sourced, while the rest of the blueprints to complete the processor remain closed source, forcing you to pay Alibaba for the full thing. For evaluation purposes, at least, you should be able to experiment with the design on a suitable FPGA, if and when any source code is made public. It may also go on sale as a physical finalized processor from Alibaba. Nothing concrete has been announced.

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The aforementioned RV64GCV designation means the Xuantie 910 implements the base 64-bit RISC-V ISA (RV64G), supports compact 16-bit-wide instructions (C) as well as the usual 32-bit-wide instructions, and supports still-in-development vector math operations (V). Interestingly enough, though, it is also said to include 50 non-official instructions for assisting and accelerating various tasks, from memory management and CPU core wrangling to storage access. While RISC-V has strong support for instruction set extensions, 50 seems a bit much: that's more than the base 32-bit integer-only instruction set. It's almost as if the Xuantie 910 is a custom processor architecture that happens to be RV64GCV compatible.

Alibaba also claims the Xuantie 910 is up to 40 per cent faster than rival RISC-V implementations, notably SiFive's 64-bit U74 that is billed as "the world’s highest performance RISC-V application processor, capable of supporting full-featured operating systems such as Linux." Alibaba told its Cloud Summit audience the U74 can manage a CoreMark benchmark score of 5.1/MHz, whereas its design can reach 7.1. Bear in mind, the U74 is about on a par with Arm's Cortex-A50-series CPUs. As always, take vendor-supplied benchmark numbers with a huge pinch of salt.

“The breakthrough is more than a mere performance enhancement of RISC-V processors,” said Jianyi Meng, senior director at the Alibaba Group, who led the development of XT 910, according to a press release from the RISC-V Foundation that has since strangely and mysteriously disappeared from its website.

“It means more IoT areas that require high-performance computing such as 5G, AI, networking, gateway, self-driving automobile, and edge server can now be powered by this latest RISC-V processor, which was previously used for simple embedded devices like smart-home appliances.”

The chip's speed comes from not just its extra instructions, we believe, but also its ability to perform out-of-order execution, a technique used by modern processors to jam their foot on the gas and run software much faster than if they were working in-order. Without out-of-order execution, your phone or laptop just wouldn't be anywhere near as fast as it is today.

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It basically works by looking ahead through instructions that are due to be executed, and identify those that can be safely run earlier than expected while other operations complete. It maximizes the efficiency of the CPU. It is fair to say today's publicly-known RISC-V cores are pretty much in-order, with the notable exception of BOOM (the Berkeley Out-of-Order Machine) and derived designs. And so this is why, we suspect, the XT 910 has an edge over some or all of its RISC-V rivals.

But this potentially comes at a price: speed over security. The out-of-order XT 910 may, by its very nature, suffer from one or more of the many forms of Spectre, a class of speculative-execution-reliant security vulnerabilities that can be exploited by malicious code to sniff secrets from other software. Applications and operating systems running on it may well have to make sure they have suitable anti-Spectre mitigations in place.

Alibaba CEO Jack Ma launched T-head last year after he revealed ambitions to manufacture homegrown chips geared for AI so that China would be less reliant on US imports and technology. It’s a smart move, considering the two countries are locked in a tit-for-tat trade war, and are slapping tariffs or export restrictions on kit, affecting everything from aerospace to computer networking. Alibaba can also license Xuantie 910’s blueprints to its Middle Kingdom customers to build more homegrown Chinese chips that focus on AI, 5G, and so on. It's basically a smart way to bypass America, its semiconductor industry, and its trade crackdowns, and go it alone... using tech that started out in the US.

However, the proposed open-source nature of the XT 910 means Western engineers can get their hands on Alibaba's alleged world-beating out-of-order multi-core processor technology.

"We believe many chip developers can benefit from this technology breakthrough, which also helps accelerate the growth of the RISC-V community now that more IoT areas can be explored," said Calista Redmond, CEO of the RISC-V Foundation, in that now-vanished press statement.

"I believe the RISC-V community, especially the community in Asia, will be on a much faster growth trajectory in the years ahead."

We asked the RISC-V Foundation for more comment, and why the statement was quietly pulled, and we've not heard back. We note that SiFive is a founding platinum member of the foundation, and may not have appreciated Alibaba's benchmark dunk, but we're just speculating here in the silence.

There's also no word from Alibaba on the XT 910. We'll let you know if we hear more details. ®


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