SiFive says it has designed its most powerful RISC-V CPU core yet, and Intel is going to put it under the noses of customers to gauge their interest.
The 64-bit P550 core will be aimed at application processors in data center infrastructure and networking equipment, and higher-end consumer kit. Intel says it will put one or more of the CPUs into a 7nm chipset code-named Horse Creek to show to developers and manufacturers, the idea being that said customers can see this silicon to evaluate SiFive's RISC-V designs for future products.
“We are pleased to be a lead development partner with SiFive to showcase to mutual customers the impressive performance of their P550 on our 7nm Horse Creek platform," Intel Fellow Amber Huffman, CTO of Chipzilla's IP engineering group, said in a canned statement.
"By combining Intel's leading-edge interface IP such as DDR and PCIe with SiFive's highest performance processor, Horse Creek will provide a valuable and expandable development vehicle for cutting-edge RISC-V applications."
Horse Creek is an Intel platform that we’re developing for early software development for RISC-V
We asked Intel for more info on the chipset, and a spokesperson told us: "Horse Creek is an Intel platform that we’re developing for early software development for RISC-V. We’re not sharing configuration details at this time," added that it is "internal-only" to Intel.
A SiFive spokesperson, meanwhile, told us: "Intel is using the SiFive Performance P550 as part of their Horse Creek platform alongside their leading-edge interface IP, on the Intel 7nm platform, as part of their support of RISC-V."
In other words, this isn't a set of chips for production use or general availability. If you're interested in using SiFive's latest designs and want to see how they'd work in a processor with Intel's RAM and PCIe controllers on its 7nm process node, you can ask nicely for a look at Horse Creek, which may answer your questions.
One hopes this will go better for SiFive than Intel's previous attempts to use non-x86 architectures, such as Arm and Itantic. There's no guarantee this will come to anything; it's clearly Intel toying with the idea of RISC-V and seeing if anyone's willing to evaluate its spin on it.
- Intel made $2bn+ takeover offer for RISC-V chip darling SiFive – report
- RISC-V boffins lay out a plan for bringing the architecture to high-performance computing
- Beagleboard peeps tease dual-core 64-bit RISC-V computer with GPU, AI acceleration, more for under 100 quid
- Seagate says it's designed two of its own RISC-V CPU cores – and they'll do more than just control storage drives
Given this tie up between Intel and SiFive, and the conversations that must have taken place between the two, you can see why word emerged of Intel offering at least $2bn to take over SiFive. If the x86 giant is at the stage of coming up with a non-x86 development platform to push to customers, why not acqui-hire the team behind it along with their blueprints and make it all 100 per cent Intel. Especially with Nvidia trying to snap up Arm, and AMD gobbling up Xilinx.
Tell me more about the core
The P550 launch coincides with SiFive tidying up its portfolio. The chip design upstart has rebranded its CPU cores under three umbrellas.
One is SiFive Essential, which has the majority of its long-standing cores, such as its E and S-series for embedded electronics, and U-series for application processors; we're promised more updates for that group in July. The second is SiFive Intelligence, which is aimed at accelerating machine-learning code, and includes the X280 used by Tenstorrent.
The third is SiFive Performance, which is home to the P550 and its less-beefy sibling, the P270. The P550 is an "evolution" of the U84 core that came out in 2019, according to SiFive. The more cynical among you may say that SiFive grouped its older cores under the Essentials brand, shifted the U8-series into a new Performance group, and tweaked the U84 to form the P550.
In 2019, SiFive claimed its U84 was comparable to Arm's Cortex-A72 that launched in 2016. Now in 2021 it's saying its P550 is comparable to the Cortex-A75 that launched in 2019, to give you an idea of the stalking distance between SiFive and its chief rival Arm. For sure, SiFive's cores aren't challenging Arm at the high end, though the upstart is still in Arm's rearview mirror.
The P550 core is a 13-stage, triple-issue out-of-order RV64GBC design – the G meaning it has a bunch of standard features, such as a floating-point unit; the B meaning it supports the RISC-V bit manipulation extension; and the C meaning it supports 16-bit-wide instructions as well as the usual 32-bit-wide instructions. It is a fully 64-bit CPU core capable of running Linux and other OSes. Vector extensions are expected to be added to the Performance group's out-of-order cores at some point.
An example configuration could be four CPU cores each with 32KB of L1 data cache and 32KB of instruction cache, and 256KB of L2 cache, clocked at 2.4GHz on 7nm. SiFive reckons each core can reach a SPEC2006int score of 8.65 per GHz.
Being an out-of-order core, with some level of speculative execution, the P550 is possibly vulnerable to Spectre-style data-stealing attacks by malware. We asked SiFive how it will mitigate any side-channel leaks, and the biz spared no detail in explaining how it'll tackle the problem using software and hardware mechanisms.
"SiFive uses industry best practices for security when designing our architectures, and will assist in creating customer implementations that use the SiFive Performance P550 to be secure against known attacks through a combination of hardware and software," we were told.
The P270 is a simpler affair. This is a dual-issue in-order RV64GBCV design – the V means it supports 256-bit-vector math instructions – with an eight-stage pipeline, clocked up to 2.3GHz on 7nm.
When it was founded in the mid-2010s, SiFive made parts of its Freedom system-on-chip designs, including the CPU cores, available as open source. However, in March, it archived its GitHub repository containing those blueprints, meaning there'll be no more updates to that particular repo, and we note that the Performance series isn't open source. The biz told us that while it's trying to collaborate with others on RISC-V, for now it's keeping its latest stuff closed source.
"SiFive continues to work with leaders in the open-source space such as Canonical and the Barcelona Supercomputing Center, to help advance RISC-V development and adoption," a spokesperson said. "As we determine the next steps for our company growth, we’re evaluating the best strategy for new products. The SiFive FU740 as seen in the HiFive Unmatched is an open-source SoC."
RISC-V being a set of open-source specifications, though implementations can be closed.
The Performance designs are ready to be licensed, and we may see the cores shipping in chips next year. "We are in discussion with lead customers and partners now, and expect to see silicon some time in 2022," a SiFive spokesperson told us. ®