Europe completes first phase of silicon independence project

Three years of R&D and design work to be tested with plans to build native ‘super in 2023

The European Processor Initiative (EPI) has concluded the first phase of its efforts to create made-in-Europe chips, an effort it is hoped will reduce reliance on imports, improve sovereign capabilities, and create the continent's first exascale supercomputer.

The EPI’s end-of-year report, published this week, notes a few major achievements, among them delivering the specification of “Rhea”, the first generation of the EPI General-Purpose Processor (GPP) implementation and its future derivates.

Rhea is built on Arm’s Neoverse V1 processor architecture, but it also has 29 RISC-V cores deployed as controllers. Rhea is planned to be deployed in an exascale super in 2023.

The chip was designed by French company SiPearl, which partnered with Atos to design the silicon.

SiPearl CEO Philippe Notton told The Register, in October 2021, that the Intel's upcoming Ponte Vecchio GPU accelerator will be paired with its Rhea chips in supercomputers.

The use of open-source instruction-set architectures ensures freedom from proprietary licences and export restrictions

Rhea will also use a RISC-V power controller developed by the University of Bologna and ETH Zurich. The controller uses "advanced control and artificial intelligence algorithms for the power management of large-scale systems-on-chips," according to EPI.

Another Phase One achievement was work on security IP that provides advanced, common-criteria certified, sovereign security IP for HPC and edge processors. One output of this effort is a “crypto tile” for integration into other open silicon.

Development of the European Processor Accelerator (EPAC) test chip proof of concept was another Phase One achievement.

Barcelona Supercomputing Center and Croatia-based University of Zagreb developed vector processing units for high-performance, low-power computing. It is based on Barcelona-based Semidynamics’ Avispado RISC-V core .

The project also delivered a proof of concept for an innovative embedded high-performance compute platform and associated software development kit for the automotive market.

Most of the EPI’s work is done on the RISC-V architecture, often referred to as the Linux of chips with engineers collaborating to design, set and improve the architecture. It was created by researchers in 2010 and is free to license.

The architecture offers a modular design that allows developers to pick from extensions that add specialist vector processing, security and virtualization functionality.

"The use of open-source instruction-set architectures ensures freedom from proprietary licences and export restrictions," the EPI said, a nod to the fact that Arm and Intel make fine products, but are beholden to government regulation that can prevent their tech crossing borders.

The EPI has 28 partners collaborating on chip designs across 10 European countries. Phase one of the initiative had a budget of €79 million, with funds going to Europe-based startups, companies and researchers to develop chips.

It’s hoped the project strengthens local supply chains by building more fabs across the continent area, to develop sovereign capacity and to address the semiconductor shortage that has slowed production of devices ranging from cars to the Raspberry Pi.

The EPI’s second phase, which starts next year, will focus on putting the chips developed in Phase One into production. ®

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