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Blistering bandwidth: JEDEC pushes out HBM3 memory specs

All that and improved energy efficiency

The JEDEC Solid State Technology Association has published the official standards for HBM3 memory, the latest update to the High Bandwidth Memory (HBM) Standard.

HBM is a high-performance memory type that uses vertically stacked memory chips that are typically mounted on the same substrate close to a CPU or GPU. There are just a few suppliers of HBM memory: SK hynix, Micron, and Samsung spring to mind.

The HBM3 standard was designed for greater bandwidth, doubling the per-pin data rate of HBM2 generation components up to 6.4Gbps, equivalent to 819GBps bandwith per device, according to JEDEC, which is in line with the HBM3 DRAM design SK hynix announced last year.

JEDEC says that HBM3 has followed an innovative approach to raising the data processing rate used in applications where higher bandwidth, lower power consumption and capacity per area are essential, including graphics processing, high-performance computing and servers.

Highlights of the standard include the doubling of independent channels from 8 in HBM2 to 16 in the new version, but each channel in HBM3 can support what JEDEC calls two pseudo channels, making for a total of 32 virtual channels. HBM3 also introduces symbol-based ECC on-die, as well as real-time error reporting and transparency for greater reliability.

Underside (Interposer side) of Sk hynix HBM3 chip.

DRAM, it stacks up: SK hynix rolls out 819GB/s HBM3 tech


According to JEDEC, a wide range of densities are possible, from 4GB (8Gb 4-high) to 64GB (32Gb 16-high), while the first generation HBM3 devices are expected to be based on a 16Gb memory layer.

HBM3 also has an eye to the future, with provision for a potential extension to support a 16-layer memory stack, in addition to the 4-layer, 8-layer and 12-layer stack configurations seen with HBM2 or HBM2E components.

Executing the DIMM sidestep: Movements in High Bandwidth Memory


In a canned statement welcoming the release of the standard, Mark Montierth, Micron's veep and general manager for High-Performance Memory and Networking, said HBM3 will enable the industry to reach higher performance thresholds with improved reliability and lower energy consumption.

Samsung's plans for HBM3 and other memory developments were discussed last year over at our sister site, Blocks & Files.

Meanwhile, a glance at SK hynix's website shows that at least some of the Korean firm's HBM3 parts are now listed as MP, meaning they are in mass production and presumably available for incorporation in products. ®

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