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If you want to make your own chip and aren't Microsoft rich, who do you turn to?
$10,000 and Efabless may be what you're looking for
Interview The likes of Google, Facebook, and Microsoft can design custom chips and have them manufactured using their billions of dollars in the bank.
Smaller outfits wishing to make their own processors or microcontrollers, say, aren't as fortunate as they lack the funds and resources. Getting even a small volume of physical chips in the hands of engineers and developers to experiment with is a big challenge. FPGAs are an option, though they have their limits, and you might just want the experience or benefits of taping out your own ASIC.
Now a biz called Efabless hopes to close the capability gap by helping people get their semiconductor blueprints into a factory for manufacturing at low cost. Getting access to a fab has become especially challenging with demand for chips outstripping assembly line output globally.
Our goal is to put design in the hands of not only chip designers who just didn't have the resources, but to make it so simple that anybody could create a chip
"Our goal is to put design in the hands of not only chip designers who just didn't have the resources, but to make it so simple that anybody could create a chip," Michael Wishart, CEO of Efabless, told The Register this week.
The company is connecting resource-constrained chip startups and universities on tight budgets to manufacturers, which then supply small volumes of completed components. The proliferation of open architectures like RISC-V, and wider availability and improvement of chip design tools, known as EDA software, have arguably contributed to a boom in custom chip designs, mostly by lowering the barrier to entry.
Planning out the logic in a chip is only a small part of the process. Not only does it need to be simulated, prototyped, and verified, it has to go through various engineering stages to make it manufacturable before it even gets to the fabrication and packaging stages, and then you need to build the PCBs the chips will go onto for testing and product assembly. "It is essential to solve the entire idea of the chip cycle, including the last mile of prototyping and then production," Wishart explained.
Nvidia and Apple popularized the fabless business model amid a consolidation in the semiconductor world in which plant-owning companies were gobbled up by others, reducing the number of silicon die manufacturers. AMD also turned fabless and sold off its assembly lines due to the overhead costs.
"The upfront costs are too high because that entire model was geared for a different need: mass volume parts," Wishart said, referring to the fact that not everyone needs components in quantities of a million.
This situation created an opening for outfits like Efabless, which is more of an intermediary between chip designers and manufacturers. The company had 160 tape-outs in 2021, up from none in 2020, Wishart said.
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One program, dubbed ChipIgnite, launched recently by Efabless includes options to get a certain number of chips made for around $10,000, or to get 1,000 parts for $20 apiece. The dies are manufactured on Skywater Technology's 130nm process, which isn't advanced, but is potentially useful for startups and well-funded academic groups to get prototypes to experiment with and demonstrate ideas.
"For many projects, you can do that on those older nodes. It's also extremely affordable. The beauty of the older nodes right now is it gives us a chance to advance the open-source EDA environment and that's moving quickly," Wishart said. There is a collection of open-source chip design tools that include Chisel, Amaranth, and Yosys to get you started.
"You'll see an additional foundry with an additional node in the next several months get announced," he added. "We're not going to 45nm or 65nm or 28nm yet, but it will come."
Efabless provides back-end and flow-based tools to automate chip design and optimize it for the manufacturing process. For example, a designer can drop pieces of a design into a blank space on Caravel, a silicon die framework that already has a microcontroller, memory, and management area set aside.
Efabless is also running an initiative called OpenMPW, in which Google funds the design and manufacturing of chosen open-source chips for organizations. We've previously reported on the web giant's earlier offer of free chips for selected projects. One OpenMPW participant is Johannes Kepler University in Linz, Austria, where Harald Pretz, a professor, hopes to get a physical mixed-signal chip into the hands of students.
Pretz submitted the open-source design recently and will be competing with other entries for the 40 seats available as part of the program. The submission deadline for projects is March 21.
Prof Pretz has many reasons to get physical chips, including seeing how well the design tools, which include Icarus Verilog for RTL simulation, actually work. Others areas of interest include seeing how well the design holds up in real-world circumstances and how quickly students go through the learning curve.
I want to see functional silicon, produced by a complete open-source flow, working in our lab before I can commit larger projects to it
"I want to see functional silicon, produced by a complete open-source flow, working in our lab before I can commit larger projects to it, so in a sense, it was a test drive for our research group," the professor told The Register.
Pretz also used the possibility of an actual tape-out as an additional incentive for students to build integrated circuits. If the university's design is included in the tape-out, Pretz expects to get back the components in December.
"We will receive 50 packaged parts and five ready-made evaluation boards, which is super convenient. Since I will get so many pieces, I promised every participating student a chip for their usage," Pretz said.
Efabless operates by combining a bunch of small orders and ships them over to a manufacturer as one high-volume order. This is known as a multi-project wafer approach, or MPW, as it fits a range of customer designs across each wafer. Manufacturers typically prefer these kind of bulk orders due to the overhead cost of adjusting machinery for each job.
MOSIS is another such outfit offering MPW services; there are others around the world.
"It's like a pallet with 40 separate designs on it," Wishart said. "But to the foundry, it looks like one design."
"We manage the prechecks and all of that, verifying the manufacturability of the design is all done before the design even goes to the foundry," continued Wishart, who previously was a board member at Cypress Semiconductor, and was the chairman of Goldman Sachs' global technology group.
Efabless, which was founded in 2014, earlier this year received a round of seed funding from New North Ventures, which has a portfolio that includes AI and cybersecurity companies. In addition to Google, the company's backers include Arm and GlobalFoundries. ®