Samsung beats TSMC to be first to produce 3nm chips
Lower power consumption, improved performance, and a second generation of the technology on the way
Samsung has started production of chips using its 3nm fabrication process, beating rival TSMC, which expects to begin making chips with its N3 node generation later this year.
The resultant chips are claimed to reduce power consumption by up to 45 percent and improve performance by up to 23 percent, with further gains promised in a second generation of the process.
Korea's electronics giant said it has started initial production with its 3nm process node, which introduces what the firm calls Multi-Bridge-Channel FET (MBCFET) technology. This is Samsung's version of the Gate-All-Around (GAA) transistor architecture, where the gate material wraps around the conducting channel.
A feature of the GAA architecture, at least in the early designs, is that the conducting channel is built using vertically stacked nanosheets. TSMC has already said it is planning to use nanosheets for its 2nm N2 production node slated for 2025, but is still using a FinFET design for its 3nm chips.
Samsung said that its MBCFET technology uses nanosheets to create wider channels than rival GAA technologies that implement nanowires, and that this allows for higher performance and greater energy efficiency. The company claimed it is able to adjust the channel width of the nanosheet to optimize power usage and performance to meet various customer requirements.
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According to the company, chips manufactured using this 3nm production process will be able to reduce power consumption by up to 45 percent, improve performance by 23 percent, and see a reduction in area of 16 percent when compared to those manufactured with a 5nm process.
Samsung said the first applications for this technology will be for semiconductor chips aimed at "high performance, low power computing," and that it plans to expand to mobile processors.
But this is just the chipmaker's first generation of 3nm technology, and a second generation is planned that will improve on that by power consumption reduced by up to 50 percent, performance improved by 30 percent, and area reduction of 35 percent.
Samsung's president and head of Foundry Business Dr Siyoung Choi claimed the company has grown rapidly because of its ability to demonstrate leadership in applying next-generation technologies to manufacturing, and said it was continuing this by introducing the world's first 3nm process with its MBCFET technology.
However, the company does not mention any customers for this 3nm process. According to some sources, this is because it is treating the initial production batches as a trial run and is not expecting the yield to be high enough to qualify as full-scale production. There were reports earlier this year that the 3nm yield was rather low.
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According to one source, Samsung's initial customer that will use the early 3nm silicon will be a Chinese company called PanSemi that specializes in chips designed for Bitcoin mining.
Various other reports claim that mobile chipmaker Qualcomm is considering using Samsung's 3nm technology to produce its smartphone chips, even though reports from earlier in the year suggested that it had given the contract exclusively to TSMC.
According to Bloomberg, Samsung needs to demonstrate it can produce its 3nm chips at the same cost and efficiency level as TSMC before it is likely to win new orders from the likes of Apple and Qualcomm.
Meanwhile, TSMC recently announced that it is enhancing its N3 node generation with FinFlex technology, which will allow chip designers the flexibility of mixing different standard cells on the same die, once the 3nm production process is up and running.
This is expected to enable different parts of a chip to be optimized for different performance and power requirements, a key capability which might mean that Samsung may not have such a great advantage from being first to 3nm after all. ®