Don't feel left out, chip designers. Nvidia's made a chatbot assistant for you, too
In the lab, anyway
As AI finds its way into some chip design workflows – resulting in neural networks helping design better processors for neural networks – Nvidia has shown off what can be done in that area with chatbots.
You may recall Google using machine learning to improve its TPU accelerator family, and outfits like Synopsys and Cadence, which make software suites for designing chips, are said to be baking AI into their apps. Nvidia has spoken of GPU-accelerated lithography tooling, and now has demonstrated something kinda related to that: a large language model that can act as an assistant for semiconductor engineers.
A paper emitted [PDF] by Nvidia on Monday, describes how this generative AI might be used in the design and development of future chips. As far as we can tell, this AI hasn't been released; it appears the GPU giant hopes the research will act as a guide or inspiration for those considering building such a chatty system or similar bots.
Designing a microprocessor is a complex process involving multiple teams each working on different aspects of a blueprint. To demonstrate how this process can be assisted, a team of Nvidia researchers employed the corp's NeMo framework to customize a 43-billion-parameter foundation model using data relevant to the design and development of chips, a training set said to total more than a trillion tokens – with those tokens each representing parts of words and symbols.
This model was further refined over the course of two training rounds, the first involving 24 billion tokens worth of internal design data and the second using 130,000 conversation and design examples, according to Nvidia.
Researchers then used these resulting ChipNeMo models – one with seven billion, the other with 13 billion parameters – to power three AI applications, including a pair similar to ChatGPT and GitHub Copilot. These work about the way you'd expect – in fact, they act pretty much like bog-standard virtual assistants – but have been tailored to deliver output related to a narrower set of data specific to semiconductor design and development.
To skip the fluff, see pages 16 and 17 of the above paper for examples of use. These include using the bots to generate System Verilog code – a hardware-design language used to design chip logic – from queries; answer questions about processor design and techniques for testing; write scripts to automate steps in the design process; and produce and analyze silicon-level bug reports.
Ultimately, it seems the goal was to show that generative AI can be used for more than just writing normal app code, bad poetry, and ripping off illustrators: it can produce Verilog and other stuff related to semiconductor engineering. Given the complexity of chip design, one would hope engineers working on that sort of thing wouldn't need an ML assistant, but that's the world we live in now, we suppose.
And of course, Nvidia would hope you'd use its GPUs and software to train and run these sorts of systems.
"This effort marks an important step in applying LLMs to the complex work of designing semiconductors," Bill Dally, Nvidia's chief scientist, said. "It shows how even highly specialized fields can use their internal data to train useful generative AI models."
While the researchers have shown how generative AI could be useful in facilitating the design of semiconductors, humans are still very much driving the process. Nvidia noted care needed to be taken to clean and organize the training data; and whoever handles the output needed to be skilled enough to understand it, we add.
Nvidia also found that by narrowing the scope of the smaller AI model, they were able to achieve better performance compared to general-purpose LLMs, such as Llama 2 70B, using a fraction of the parameters. This last point is important as smaller models generally require fewer resources to train and run.
Looking ahead, Mark Ren, the Nvidia researcher who led the project, expects AI to play a larger role in advanced chip development. "I believe over time large language models will help all the processes, across the board," he said.
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This isn't Nvidia's first application of accelerated computing and machine learning in the service of semiconductor development. CEO Jensen Huang has been talking up the concept for a while now.
"Chip manufacturing is an ideal application for Nvidia accelerated and AI computing," he said during the ITF semiconductor conference in May.
As we learned earlier this year, Nvidia GPUs are already used by the likes of TSMC, ASML, and Synopsys to accelerate computational lithography workloads, while KLA Group, Applied Materials, and Hitachi are using Nvidia GPUs to run deep-learning code for e-beam and optical wafer inspection. ®