Intel flashes 4 Tbps optical chiplet to supercharge datacenters

Likens tech to going from horse-drawn carriages to trucks

Intel has demonstrated an optical chiplet co-packaged with a CPU capable of supporting 4 Tbps data links to feed the increasing datacenter bandwidth requirements of AI and high performance computing (HPC) applications.

The Santa Clara chipmaker claims its prototype optical compute interconnect (OCI) chiplet is a leap forward in high-bandwidth interconnect tech. The company has backed silicon photonics for many years.

Intel's demonstration at the Optical Fiber Communication Conference earlier this year showcased a data connection between two systems over a single-mode optical fiber patch cord. Both systems used an OCI chiplet co-packaged with an Intel CPU.

Intel OCI chiplet

Intel's OCI chiplet next to pencil eraser

This type of connection is key to scaling up datacenter compute to meet the requirements of AI acceleration workloads, Intel said. These are driving exponential growth in IO bandwidth, and while electrical IO supports high bandwidth and low power, its reach is short.

Pluggable optical transceiver modules of the type already widely used in datacenter clusters can increase reach, but are costly and consume too much power at the scale required, at least according to Intel, whereas a co-packaged solution can support higher bandwidths with greater power efficiency and lower latency because of its proximity to the CPU.

Chipzilla offered a somewhat labored analogy that stepping up from electrical IO to integrated optical IO for communications between CPUs and GPUs will be like going from horse-drawn carriages to modern day trucks for carrying goods.

"The ever-increasing movement of data from server to server is straining the capabilities of today's datacenter infrastructure, and current solutions are rapidly approaching the practical limits of electrical I/O performance," Thomas Liljeberg, Intel's senior director for Product Management and Strategy in Integrated Photonics Solutions, said in a statement.

This first OCI chiplet is designed to support 64 channels of 32 Gbps data in each direction over fiber links of up to 100 meters, and is compatible with PCIe 5.0. It incorporates a silicon photonics integrated circuit (PIC), comprising on-chip lasers and optical amplifiers, with an electrical IC.

In terms of power efficiency, Intel claims the OCI chiplet consumes 5 pico Joules (pJ) of energy per bit, whereas pluggable optical transceiver modules consume about 15 pJ/bit.

Intel is working with select customers to co-package OCI technology with their system-on-chips (SoCs) as an optical IO solution, but hasn't offered any time frame for when we can expect to see it in production chips.

IDC Senior Research Director for EMEA Andrew Buss told The Register that this is potentially a significant step forwards.

"This is a very important development as it will enable new ways to develop and implement high speed and low latency and also energy efficient (and possibly cache coherent) communications fabrics direct to CPU sockets in very large systems," Buss said, but added that it will take some time to commercialize into volume production.

"The key here is the ecosystem of platform advancements that need to come together to deliver a viable solution that can scale to volume production reliably," he said.

One of these is the shift to a glass substrate, that Intel demonstrated at Innovation 2023 in Santa Clara, which would allow for the integration of chiplets in a package that can then provide the advantages that come with the shift from electrical to photonic IO and communications, Buss said.

Last year, Intel sold off its silicon photonics transceiver module biz as part of restructuring and cost-cutting measures, offloading it to electronics manufacturer Jabil. The chip giant said at the time that it wanted to focus its silicon photonics efforts on emerging applications. ®

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