The $100B memory war: Inside the battle for AI's future

The AI gold rush is so large that even third place is lucrative

Feature The generative AI revolution has exposed a brutal truth: raw computing power means nothing if you can't feed the beast. In sprawling AI datacenters housing thousands of GPUs, the real chokepoint isn't processing speed – it's memory bandwidth.

While engineers obsessed over FLOPS for decades, the industry now faces a new iron law: if you can't move data fast enough, your trillion-dollar AI infrastructure becomes an expensive paperweight.

Enter High Bandwidth Memory 4 (HBM4), a 3D-stacked memory technology that promises unprecedented bandwidth per chip. This could determine which companies dominate – or disappear from – the AI landscape. This isn't just another incremental upgrade; it's the difference between training the next breakthrough AI model in weeks versus months, between profitable inference and burning cash with every query.

Earlier this year, JEDEC finalized the HBM4 memory standard for high-performance AI. The new version offers higher per-pin speed and interface width than its HBM3 predecessor, targeting 8 Gbps per pin across a 2,048-bit interface for 2 TB/s of bandwidth per memory stack. In practical terms, that's roughly twice the bandwidth of current HBM3 chips, which will be a significant development for AI accelerators.

Another improvement comes in the form of more capacity. HBM4 supports taller stacks up to 16 high (16 memory dies bonded), with per-die densities of 24 Gb or 32 Gb, enabling a maximum of 64 GB per stack. In other words, a single HBM4 module could hold as much data as a high-end GPU's entire memory today.

Despite the speed boost, HBM4 is designed with power efficiency in mind. It allows for lower I/O voltages and core voltages, thereby improving energy efficiency. These advancements squarely target the needs of generative AI. Training large language models or running giant recommendation systems involves constantly moving terabytes of data through GPUs. Faster, wider memory reduces this bottleneck, allowing each GPU to process data more quickly.

However, developing and manufacturing HBM4 presents a greater challenge. Only three memory vendors – SK hynix, Micron, and Samsung – currently have the requisite DRAM and 3D stacking expertise to deliver HBM4 in volume. Their success or failure in achieving mass production will have a direct impact on the AI hardware roadmaps of companies such as Nvidia, AMD, and Broadcom for upcoming GPUs and AI accelerators.

SK hynix is clearly seen as the front-runner in HBM4. It has a track record of firsts in HBM. It supplied the first-generation HBM for AMD GPUs in 2015 and has led the way in HBM2, HBM2E, and HBM3 supply to major customers. According to Counterpoint Research, the Q2 2025 market share of SK hynix is at 62 percent, which is significantly ahead of its rivals. That dominance stems from its strong alliance with Nvidia.

Even before the official JEDEC specification was released, SK hynix had already begun sampling HBM4. In fact, it shipped the world's first 12-layer HBM4 samples in March 2025, demonstrating that it had the stacking technology ready. SK hynix announced that it had completed development of its HBM4 design and had prepared it for high-volume manufacturing.

"By supplying the product that meets customer needs in performance, power efficiency, and reliability in a timely manner, the company will fulfill time to market and maintain a competitive position," says Joohwan Cho, head of HBM development at SK hynix.

By September 2025, SK hynix confirmed that its HBM4 meets all the specifications. It runs at 10 GT/s per pin, which is 25 percent faster than the baseline 8 GT/s. This 10 GT/s speed class puts SK hynix right at Nvidia's requirement for the Blackwell-generation GPUs. SK hynix hinted that its design could exceed the JEDEC specification, presumably to provide Nvidia with the performance headroom it requires.

SK hynix is using its proven 1b DRAM process (a fifth-generation 10nm node) for the HBM4 DRAM dies. This is a slightly older node than the cutting-edge technology, but it offers low defect density and higher yields, which is crucial when stacking a dozen dies together. For the base logic die that sits under the DRAM layers, SK hynix hasn't publicly disclosed the node. However, speculation suggests either the TSMC 12 nm class or the 5 nm could be used.

The company's philosophy appears to be "make it work reliably first, then push performance," which aligns with the conservative yet steady leadership of HBM. As of late 2025, SK hynix is ready to ramp HBM4 production as soon as customers need it. Although the company hasn't announced an exact ship date, all indications suggest that volume shipments can start in early 2026 after final qualifications are completed.

Nvidia's flagship GPUs are the obvious first destination. Industry reports suggest that SK hynix HBM4 will be first integrated into the Rubin GPU platform. Additionally, given the close relationship between Nvidia and SK hynix, it's likely that they will supply the majority of the initial memory modules for the Blackwell GPUs in 2026. This puts SK hynix in the driver's seat to be first to ship HBM4 at scale.

SK hynix's market lead is also translated into substantial financial gains this year. In Q2 2025, the company reported 77 percent of its sales were associated with HBM and related AI memory. Despite the current dominance, the race to supply HBM4 isn't over. Their rivals are charging hard in pursuit.

The volume challenger

Micron has been a latecomer to the HBM space. In the past year, the company surpassed Samsung in market share, reaching 21 percent compared to Samsung's 17 percent. This is a significant development, given that Micron had virtually no HBM presence a few years ago. The catalyst has been the surging demand for generative AI.

The success is primarily built on HBM3E. It secured supply agreements with multiple customers, including six HBM customers spanning GPUs and accelerators. Micron managed to become a supplier for Nvidia AI GPUs. This was because Nvidia has historically sourced memory from two suppliers for redundancy, and Micron got a slice of that pie alongside SK hynix.

By late 2025, Micron's HBM business is expected to have expanded significantly. The company reported in the September 2025 quarter that the revenue for the HBM business reached nearly $2 billion. That means HBM went from a niche product to a double-digit percentage of the company's total revenue in a very short time. Micron even stated that its HBM output for all of 2025 is completely sold out, and 2026 is largely pre-booked.

Riding this momentum, Micron began shipping HBM4 samples in June 2025. The technology provided 36 GB, 12-high stacks to key customers, one of which is reported to be Nvidia. Over the past few months, Micron has further improved the silicon. By Q4 2025, Micron announced that its HBM4 samples were running at speeds above 11 Gbps per pin, delivering over 2.8 TB/s per stack.

Micron HBM4 will likely enter mass production in calendar 2026. It has already secured multibillion-dollar agreements for HBM3E in 2026, and major buyers, including cloud giants and GPU vendors, are counting on Micron as part of their 2026 supply chain. Given that Nvidia is expected to dual-source Blackwell's memory from SK hynix and Micron, if SK hynix can't meet all the demand or if Nvidia wants second-source flexibility, Micron is there to fill the gap.

Pushing the limits

Samsung has found itself in an unusual position in the HBM4 race, having to play catch-up. Despite its massive manufacturing prowess, Samsung has lagged in early HBM generations.

Samsung's troubles become evident with HBM3E. While SK hynix and Micron ramped 8-high and 12-high HBM3E for customers, Samsung struggled to get its 12-high stacks qualified. It reportedly took 18 months and several attempts to meet Nvidia's quality and performance criteria for HBM3E. By Q3 2025, Samsung had finally cleared Nvidia's validation, with its 5th-generation HBM3E 12-stack passing all tests.

Until now, Samsung HBM has appeared only in AMD's MI300-series accelerators. However, with Nvidia's certification, the company has agreed to purchase between 30,000 and 50,000 units of 12-high HBM3E for use in liquid-cooled AI servers. Samsung's HBM3E is also shipping for AMD's accelerators as of mid-2025.

One of the key challenges for the lag was that they attempted to use a cutting-edge 1c DRAM process (a sixth-generation 10nm node) for their 12-stack HBM3E and upcoming HBM4, but ran into yield problems. As of July 2025, pilot runs on 1c yielded only 65 percent, which is a big problem for mass production. Samsung had to recalibrate and revise the DRAM design, improve the base die, and enhance thermal management.

Samsung aims to start mass production of HBM4 in the first half of 2026. In Q3 2025, it began shipping large volumes of HBM4 samples to Nvidia for early qualification. However, the company also has a strategic ace up its sleeve, a deepening partnership with AMD (and OpenAI). In October 2025, news broke that AMD had signed a significant deal to supply Instinct MI450 GPU systems to OpenAI. Samsung is reportedly the primary supplier of HBM4 for AMD's MI450 accelerator.

Ultimately, the race to supply HBM4 is not a zero-sum game. All three vendors will be pushed to their limits to deliver the highest-performance memory modules for generative AI. The real winners will be those who can navigate the technical challenges to deliver at scale.

For the sake of a wider market, having all three succeed would be ideal. It would ease the hard constraints and increase AI capacity in the hands of researchers and businesses. In any case, 2026 will be a decisive year in this memory race. It will be interesting to see which supplier actually shows up in volume first, which will reveal who truly won this round of the race and whose AI product plans might need to be adjusted because they bet on an also-ran. ®